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power management & multimarket data sheet revision 1.0, 2013-12-12 final esd105-b1-02 series low capacitance & low clam ping bi-directional esd / transient protection diodes ESD105-B1-02ELs ESD105-B1-02EL tvs diodes transient voltage suppressor diodes
esd105-b1-02 series final data sheet 2 revision 1.0, 2013-12-12 trademarks of infineon technologies ag aurix?, bluemoon?, comneon? , c166?, crossave?, canpak?, ci pos?, coolmos?, coolset?, corecontrol?, dave?, easypim?, econobridg e?, econodual?, eco nopack?, econopim?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, isofac e?, i2rf?, isopack?, mipaq?, modstack?, my-d?, novalithic?, omnitune?, optimos?, origa?, profet?, pro-sil?, primarion?, primepack? , rasic?, reversave?, satric?, sieget?, sindr ion?, smarti?, smartlewis?, tempfet?, thin q!?, tricore?, trenchstop?, x-gold?, xmm?, x-pmu?, xposys?. other trademarks advance design system? (ads) of agilent tech nologies, amba?, arm?, mu lti-ice?, primecell?, realview?, thumb? of arm limited, uk. autosar? is licensed by autosar development partnership. bluetooth? of bluetooth sig inc. cat-iq? of dect forum. colossus? , firstgps? of trimble navigation ltd. emv? of emvco, llc (visa holdings inc.). ep cos? of epcos ag. flexgo? of microsoft corporation. flexray? is licensed by flexra y consortium. hyperterminal? of hilgraeve incorpor ated. iec? of commission electrotechnique internationale. irda? of infrared data association corporation. iso? of international organization for standardizati on. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. mi crotec?, nucleus? of mentor graphi cs corporation. mifare? of nxp. mipi? of mipi alliance, inc. mips? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? openwave systems inc. red hat? red hat, inc. rfmd? rf micro devices, inc. sirius? of si rius sattelite radio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektro nix? of tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilo g?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorpor ated. vxworks?, wind river? of wind ri ver systems, inc. zetex? of diodes zetex limited. last trademarks update 2010-06-09 revision history: rev. 04, 2013-09-24 page or item subjects (major changes since previous revision) revision 1.0, 2013-12-12 all status change to final
esd105-b1-02 series low capacitance & low clamping bi-directional esd / transient protection final data sheet 3 revision 1.0, 2013-12-12 1 low capacitance & low clamping bi-directional esd / transient protection diodes 1.1 features ? esd / transient protection of signal lines exceeding standard: ? iec61000-4-2 (esd): 30 kv air / 25 kv contact discharge ? iec61000-4-4 (eft): 50 a (5/50 ns) ? iec61000-4-5 (surge): 5 a (8/20 s) ? one-line diode with ultra-small form factor down to 0.62 x 0.32 x 0.31 mm2 (0201) package size ? bi-directional, symmetrica l working voltage up to: v rwm =5.5v ? low capacitance c l =0.3pf (typical) ? very low clamping voltage, low dynamic resistance: r dyn =0.36 (typ.) ? pb-free package (rohs compliant) and halogen free package 1.2 application examples ? usb 3.0. 10/100/1000 ethernet, firewire, dvi, hdmi, s-ata, display ports ? mobile hdmi link, mddi, mipi, swp, nfc 1.3 product description figure 1 pin configuration and schematic diagram table 1 ordering information type package configuration marking code ESD105-B1-02ELs tsslp-2-4 1 line, bi-directional n ESD105-B1-02EL tslp-2-20 1 line, bi-directional n a) pin configuration pg-ts(s)lp-2_dual_diode_serie_pinconf_and_schematicdiag.vsd b) schematic diagram tslp-2 tsslp -2 pin 1 pin 2 pin 1 pin 2 pin 1 pin 2 pin 1 marking (lasered)
esd105-b1-02 series characteristics final data sheet 4 revision 1.0, 2013-12-12 2 characteristics attention: stresses above the max. values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.1 electrical characteristics at t a = 25 c, unless otherwise specified figure 2 definitions of electrical characteristics table 2 maximum ratings at t a = 25 c, unless otherwise specified 1) 1) device is electrically symmetrical parameter symbol values unit min. typ. max. esd 2) air discharge contact discharge 2) v esd according to iec61000-4-2 v esd ? ? ? ? 30 25 kv peak pulse current ( t p = 8 / 20 s) 3) 3) i pp according to iec61000-4-5 i pp ??5a peak pulse power 3) t p = 8 / 20 s p pk ??70 w operating temperature t op -55 ? 125 c storage temperature t stg -65 ? 150 c

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esd105-b1-02 series characteristics final data sheet 5 revision 1.0, 2013-12-12 table 3 dc characteristics at t a = 25 c, unless otherwise specified 1) 1) device is electrically symmetrical parameter symbol values unit note / test condition min. typ. max. reverse working voltage v rwm ??5.5v reverse current i r ?<120na v r =5.5v trigger voltage v t1 6.1??v holding voltage v h 6.18?v i r =1ma table 4 ac characteristics at t a = 25 c, unless otherwise specified parameter symbol values unit note / test condition min. typ. max. line capacitance c l ? 0.3 0.45 pf v r =0v, f =1mhz ? 0.3 0.45 v r =0v, f =1ghz table 5 esd and surge characteristics at t a = 25 c, unless otherwise specified 1) 1) device is electrically symmetrical parameter symbol values unit note / test condition min. typ. max. clamping voltage 2) 2) please refer to application note an210 [1] . tlp parameter: z 0 = 50 , t p = 100ns, t r = 300ps, averaging window: t 1 = 30 ns to t 2 = 60 ns, extraction of dynamic resistance usin g least squares fit of tlp characteristics between i tlp1 = 10 a and i tlp2 =50a. v cl ?1316v i tlp =16a, t p =100ns ?1922 i tlp =30a, t p =100ns clamping voltage 3) 3) i pp according to iec61000-4-5 ( t p =8/20s) ? 8.5 11.5 i pp =2a, t p =8/20s ?1114 i pp =5a, t p =8/20s dynamic resistance 2) r dyn ? 0.36 0.45 ? t p =100ns
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 6 revision 1.0, 2013-12-12 3 typical characteristics at t a = 25 c, unless otherwise specified figure 3 reverse current: i r = f ( v r ) figure 4 reverse current: i r = f ( t a ), v r =5.5v 10 -11 10 -10 10 -9 10 -8 10 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 i r [a] v r [v] 10 -12 10 -11 10 -10 10 -9 10 -8 10 -7 10 -6 10 -5 30 40 50 60 70 80 90 100 110 120 i r [a] t a [ c]
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 7 revision 1.0, 2013-12-12 figure 5 line capacitance: c l = f ( v r ), f =1mhz figure 6 peak pulse power: p pk = f ( t p ) 0.2 0.25 0.3 0.35 0.4 0.45 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 c l [pf] v r [v] f = 1 ghz f = 1 mhz 0 100 200 300 400 500 600 700 10 -7 10 -6 10 -5 p pk [w] t p [s]
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 8 revision 1.0, 2013-12-12 figure 7 clamping voltage (tlp): i tlp = f ( v tlp ) according ansi/esd stm5.5.1 - electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 =50 ? , t p =100ns, t r =0.6ns, i tlp and v tlp averaging window: t 1 =ns to t 2 = 60 ns, extraction of dynamic resistance using squares fi t to tlp characteristics between i tlp1 = 10 a and i tlp2 = 50 a. please refer to application note an210 [1] -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 i tlp [a] equivalent v iec [kv] v tlp [v] esd105-b1-02series r dyn r dyn = 0.36 r dyn = 0.36
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 9 revision 1.0, 2013-12-12 figure 8 pulse current (iec61000-4-5) versus clamping voltage: i pp = f ( v cl ) -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 i pp [a] v cl [v] esd105-b1-02series r dyn r dyn = 0.9 r dyn = 0.9
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 10 revision 1.0, 2013-12-12 figure 9 iec61000-4-2: v cl = f ( t ), 8 kv positive pulse from pin 1 to pin 2 figure 10 iec61000-4-2: v cl = f ( t ), 8 kv negative pulse from pin 1 to pin 2 -25 0 25 50 75 100 125 150 -50 0 50 100 150 200 250 300 350 400 450 v cl [v] t p [ns] scope: 6 ghz, 20 gs/s v cl-max-peak = 135 v v cl-30ns-peak = 10 v -150 -125 -100 -75 -50 -25 0 25 -50 0 50 100 150 200 250 300 350 400 450 v cl [v] t p [ns] scope: 6 ghz, 20 gs/s v cl-max-peak = -134 v v cl-30ns-peak = -11 v
esd105-b1-02 series typical characteristics at t a = 25 c, unless otherwise specified final data sheet 11 revision 1.0, 2013-12-12 figure 11 iec61000-4-2: v cl = f ( t ), 15 kv positive pulse from pin 1 to pin 2 figure 12 iec61000-4-2: v cl = f ( t ), 15 kv negative pulse from pin 1 to pin 2 -50 -25 0 25 50 75 100 125 150 175 200 -50 0 50 100 150 200 250 300 350 400 450 v cl [v] t p [ns] scope: 6 ghz, 20 gs/s v cl-max-peak = 183 v v cl-30ns-peak = 14 v -200 -175 -150 -125 -100 -75 -50 -25 0 25 50 -50 0 50 100 150 200 250 300 350 400 450 v cl [v] t p [ns] scope: 6 ghz, 20 gs/s v cl-max-peak = -185 v v cl-30ns-peak = -14 v
esd105-b1-02 series application information final data sheet 12 revision 1.0, 2013-12-12 4 application information figure 13 insertion loss measured in 50 ? environment figure 14 insertion loss vs. frequency of esd105-b1-02xx in a 50 ? system esd105-b1-02series_insertion_loss.vsd networkanalysor 50 ohm port2 esd105-b1-02series insertion loss in the application line line networkanalysor 50 ohm port1 -5 -4 -3 -2 -1 0 1 10 100 1000 10000 insertion loss [db] f [mhz] esd105-b1-tslp 0v / 3db @ 14410mhz esd105-b1-tsslp 0v / 3db @ 18142mhz
esd105-b1-02 series application information final data sheet 13 revision 1.0, 2013-12-12 figure 15 single line, bi-directional esd / transient protection application_esd5v3s1b-02ls.vsd esd sensitive device 1 2 co nne cto r protected signal line the protection diode should be placed very close to the location where the esd or other transients can occur to keep loops and inductances as small as possible . pin 2 (or pin 1) should be connected directly to a ground plane on the board . i/ o
esd105-b1-02 series package information final data sheet 14 revision 1.0, 2013-12-12 5 package information 5.1 tsslp-2-4 figure 16 tsslp-2-4 package outline figure 17 tsslp-2-4 footprint figure 18 tsslp-2-4 packing figure 19 tsslp-2-4 marking (example) tsslp-2-3-po v01 0.05 0.32 1 2 0.035 0.2 1) 0.62 0.05 +0.01 0.31 -0.02 1) dimension applies to plated terminals cathode marking 1) 0.035 0.26 0.05 max. bottom view top view 0.355 0.27 0.19 0.19 0.19 copper solder mask stencil apertures 0.57 0.24 0.62 0.32 0.24 0.14 tsslp-2-3-fp v02 ex 4 ey 0.35 cathode marking 8 tsslp-2-3-tp v03 deliveries can be both tape types (no selection possible). specification allows identical processing (pick & place) by users. ex ey punched tape tape type embossed tape 0.43 0.73 0.37 0.67

esd105-b1-02 series package information final data sheet 15 revision 1.0, 2013-12-12 5.2 tslp-2-20 figure 20 tslp-2-20 package outline figure 21 tslp-2-20 footprint figure 22 tslp-2-20 packing figure 23 tslp-2-20 marking (example) tslp-2-19, -20-po v01 0.05 0.6 1 2 0.05 0.65 0.035 0.25 1) 1 0.05 0.05 max. +0.01 0.31 -0.02 1) dimension applies to plated terminals cathode marking 1) 0.035 0.5 bottom view top view tslp-2-19, -20-fp v01 0.45 0.28 0.28 0.38 0.93 copper solder mask stencil aperture s 0.35 1 0.6 0.35 0.3 0.76 4 1.16 0.4 cathode marking 8 tslp-2-19, -20-tp v02 type code cathode marking tslp-2-19, -20-mk v01 12
esd105-b1-02 series references final data sheet 16 revision 1.0, 2013-12-12 references [1] infineon technologies ag, ?effective esd prot ection design at system level using vf-tlp characterization methodology?, application note 210, rf and protection devices, april 22, 2010, rev.1.0 [2] infineon ag - recommendations for pcb a ssembly of infineon tslp and tsslp packages
published by infineon technologies ag www.infineon.com

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